MCS Workshop at HIPEAC 2017, Stockholm

Tuesday, 22. November 2016

On 25 Jan 2017, the 5th International workshop on the “Integration of mixed-criticality subsystems on multi-core and manycore processors” will take place in conjunction with the HIPEAC 2017 conference in Stockholm. Register until 25 Dec 2016 to benefit from the early bird registration discount!

Modern embedded applications typically integrate a multitude of functionalities with potentially different criticality levels into a single system. Without appropriate preconditions, the integration of mixed-criticality subsystems can lead to a significant and potentially unacceptable increase of engineering and certification costs. This workshop focuses on solutions for the integration of mixed-criticality subsystems on multi-core processors and virtualization solutions such as hypervisors. Key topics are multicore architectures, software solutions (tools & building blocks) and extra-functional requirements such as energy-power-thermal management, security and safety. Major technical results from most representative EC research projects in the field of mixed-criticality will be presented.

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